Description These octal transparent D-type latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. While the latch-enable (LE) input is high, the Q outputs respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pull-up components. Brief Data: Logic Family: HC. Latch Mode: Transparent. Latching Element: D Type. Number of Bits: 8. Output Type: 3 State. Polarity: Non-Inverting. Mounting Type: Through Hole. Package Type: 20 PDIP. Operating Temperature: -40°C ~ 125°C. Operating Supply Voltage: 2~6V. Related Information: Detail Specification
